The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to a semiconductor structure that includes a three-dimensional (3D) resistor structure that has vertical elements and controlled resistivity. The present application also provides a method of forming such a semiconductor structure.
A resistor, which is a passive two-terminal electrical component that implements electrical resistance as a circuit element, is one of the most common electrical components present in almost every electrical device. In electronic circuits, resistors can be used to limit current flow, to adjust signal levels, bias active elements, and terminate transition lines.
In semiconductor devices, it is well known to have a thin film resistor such as, for example, a resistor composed of TaN, embedded in the chip through either a damascene approach or a subtractive etch method. For example, and during back-end-of-the-line (BEOL) processing, a thin film resistor may be embedded in an interconnect dielectric material. Prior art methods of forming thin film resistors embedded in an interconnect dielectric material are complicated and expensive. Moreover, topography issues arise when embedding a thin film resistor in an interconnect dielectric material which may degrade the final chip yield. Other issues with prior art methods of embedding a thin film metal resistor in a MOL dielectric material include variation of sheet resistivity and tuning precision.
There is thus a need for providing a semiconductor structure including a resistor structure that is embedded in an interconnect dielectric material that has design flexibility and controlled resistivity.